Gaya APA

Latha, N, R., Prasad, G, R. (2020). Memory and I/O optimized rectilinear Steiner minimum tree routing for VLSI (IJECE Vol. 10, No. 3, June 2020) . India: .

Gaya MLA

Latha, N., R.,., Prasad, G., R.. "Memory and I/O optimized rectilinear Steiner minimum tree routing for VLSI (IJECE Vol. 10, No. 3, June 2020)". India: , 2020. Text.